From Research to Production, How AVSM and AOIT Made Their Way Into Games
TUESDAY, 23 JULY, 9-10 am
In games, volumetric shadows and proper transparency have long been difficult to implement when rendering naturally occurring features like smoke, foliage, and fences. Intel Research contributed to the field with Adaptive Order Independent Transparency and Adaptive Volumetric Shadow Maps. This session shows how these technologies were implemented in actual games, how they leveraged Intel extensions for Iris Graphics, and how we solved the integration issues that were discovered along the way.
Codemasters Software Co. Ltd.
Fast Volumetric Shadows Using Epipolar Sampling and 1D Min-Max Binary Trees
TUESDAY, 23 JULY, 10:45-11:45 am
Volumetric shadows greatly enhance realism of virtual scenes and are desirable for many applications, from interactive simulations to computer games. Precisely computing the effect requires evaluation of a complex light-transport integral in a participating medium. To achieve high performance, this method combines two recent approaches, epipolar sampling with 1D min/max binary trees, and uses a simple and efficient semi-analytical solution to a scattering integral due to a point-light source. The technique has a number of parameters that allow trading quality for performance, which makes it suitable for a wide range of hardware, from Intel HD graphics to high-end discrete GPUs.
Faster, Better Pixels on the Go and in the Cloud with OpenCL* on Intel® Architecture
TUESDAY, 23 JULY, 12:15-1:45 pm
Do you need faster, better, pixels on the go or pixels in the cloud? With Intel platforms, you can render big data from the cloud on your workstation, and even render on the go with Ultrabook™ devices. And now you can accelerate your performance on those platforms by accessing device power in a standard manner using OpenCL.
This session explains not only what OpenCL is, how Intel supports it, and which developer tools are available, but also, in informative demos, how to use OpenCL to match the right device to the right task on Intel® Xeon® and Intel® Xeon Phi™ processor-based servers and workstations, and on Ultrabook devices with Intel Core processors and Intel® Iris™ and Intel® HD Graphics.
Adobe Systems Incorporated
Faster Video Creation With Higher Productivity Using Intel® Developer Tools and OpenCL*
TUESDAY, 23 JULY, 2-3 pm
This session demonstrates the power and performance of the fourth-generation Intel® Core™ processors that a developer can utilize for video-content-creation workloads. This highly optimized video-decode and real-time-video processing pipeline is accelerated on the Intel® Iris™ graphics engine. The solution not only delivers better performance, but also improves developer productivity by using programmable OpenCL* with accelerated libraries like the Intel® Integrated Performance Primitives (IPP) and the Intel® Media SDK. The session summarizes how these tools work seamlessly together to deliver faster media workloads.
Journey of Pixels in Adobe Photoshop on Intel HD Graphics
TUESDAY, 23 JULY, 3:15-4:15 pm
With the introduction of Intel® HD Graphics in 2010 and graphics moving into the CPU, processor graphics has seen huge performance improvements on GPU-bound workloads. Adobe Photoshop introduced GPU acceleration with CS4 on panning, zoom, and birds-eye-view features and Open CL acceleration in CS6 with the blur filter gallery.
In this session, Intel engineers cover some of the performance improvements they saw with Photoshop on tablets, Ultrabooks™, desktops, and workstations using Intel® HD graphics. Adobe engineers talk about their experience with OpenGL and OpenCL acceleration, using Intel graphics and tools, and how they plan to take advantage of dramatically improved processor graphics performance on Intel platforms. The session also includes a demo of Photoshop features on Intel Haswell and Denlow platforms.
Adobe Systems Incorporated
Performance-Tuning Applications for Intel GEN Graphics for Linux and Android
TUESDAY, 23 JULY, 4:30-5:30 pm
Most application developers come from one of two backgrounds: discrete graphics where the CPU and GPU do not share memory, or mobile graphics, an approach dominated by tile-based renderers. Intel HD Graphics architecture differs from these models. It is a unified memory architecture that is not a tile-based renderer.
After reviewing Intel’s unique architecture, this session discusses a number of application optimization strategies. It focuses on techniques for dynamic buffer management on a unified memory architecture, strategies to avoid (or predict) shader recompiles due to non-orthogonal state changes, and ways to optimize shaders. And it demonstrates a number of software technologies, both inside the driver and in external tools. The tools available for finding and resolving performance issues on Linux and Android for Intel graphics are different from the tools for, say, a discrete GPU on Windows. This session sheds some light on available tools and how they can be integrated in a developer's workflow.
Natural User Interaction With Perceptual Computing
WEDNESDAY, 24 JULY, 9-10 am and 10:45-11:45 am
This session explains why graphics and game developers all over the world are entering Intel’s $1M Perceptual Computing Challenge to create amazing new applications that defy the boundaries of the mouse and keyboard. It shows how to create magic by exploiting the new “perceptual” technologies, including 2D and 3D position tracking, gesture detection, facial tracking and recognition, speech recognition and augmented reality libraries. Informative in-depth technical demos show how you can start creating perceptual applications using C, C++, C#, Java, openFrameworks, Cinder, Unity, Havok, Bullet, and other technologies that take advantage of this new game-changing interface to the PC. Don’t miss this great opportunity to see how Intel Perceptual Computing puts the pixels in your hands.
Adobe Systems Incorporated
New Visual Services on Distributed Displays and the Internet
WEDNESDAY, 24 JULY, 12:15-1:45 pm
This presentation is an overview of recent research projects carried out by the Intel Visual Computing Institute on new distributed display and internet services. The institute focuses on visual computing research: acquisition, modeling, processing, transmission, rendering, and display of visual and associated data. The session focuses on techniques that enable new forms of rendering on distributed, heterogeneous platforms and new rich 3D services for the future internet.
The Intel Science and Technology Center (ISTC) for Visual Computing
WEDNESDAY, 24 JULY, 12:15-1:45 pm
The ISTC - Visual Computing engages in open, collaborative, and exploratory research in visual computing to bring modern trends in computing (the cloud, crowd sourcing, hand-held computing) to bear on hybrids of computer graphics, animation, image understanding, and large-scale gaming. This session provides a quick summary of the projects underway in the center, followed by a survey of recent results, with a focus on Technical Papers being presented at SIGGRAPH 2013.
Advantages of Multi-Core CPUs vs. GPUs for Volumetric Ray Casting
WEDNESDAY, 24 JULY, 2-3 pm
Image-acquisition technologies have improved dramatically in recent decades, enabling exponentially increasing amounts of data to be captured. During the same period, the advancements required for efficient visualization and distribution of such data have been slower to materialize, which presents significant challenges to traditional workflows. Fovia’s innovative, CPU-based High Definition Volume Rendering® solution, an advanced technology for real-time visualization and analysis of large, three-dimensional datasets, addresses this disparity. HDVR® leverages the scalability and flexibility of Intel’s multi-core CPU processors, creating a combination that exceeds the capabilities of GPU-based imaging systems. By using CPU-based volumetric ray casting to minimize computational costs and maximize quality and performance, HDVR overcomes the many limitations of currently available imaging technologies. Fovia’s HDVR uses sub-voxel super-sampling to achieve superior, high-fidelity pixel output that can be deployed locally, enterprise-wide, and via the cloud, including on mobile devices.
High-Performance Computing, Analysis, and Visualization With Xeon and Xeon Phi on TACC Stampede
WEDNESDAY, 24 JULY, 3:15-4:15 pm
The age of petaflop computing enables science at unprecedented scales, but with such capabilities come additional complexities that must be managed to run simulations efficiently and to analyze and visualize the voluminous output that they produce. This session describes how the Texas Advanced Computing Center addresses these challenges with Stampede, a 6400-node Intel Xeon and Xeon Phi cluster that provides world-class simulation, analysis, and visualization capabilities to the national open-science community. The session details the Stampede architecture, presents initial results generated with Stampede, and describes ground-breaking graphics and visualization work, achieved in partnership between Intel and TACC, that enables interactive photo-realistic visualization and rendering on both Xeon and Xeon Phi architectures. The session concludes with a discussion of how interested researchers in the public and private sectors can obtain access to Stampede to support their own work.
From Virtual To Reality - How High-Fidelity Visualization Based on Autodesk Rapid RT Technology is Accelerating Product Design Decisions
WEDNESDAY, 24 JULY, 4:30-5:30 pm
Experience tremendous workflow optimizations and productivity gains when you use high-fidelity interactive Rapid RT visualization tools with leading-edge Autodesk products running on Intel® Xeon® and Xeon Phi™ based workstations and servers. Through innovative use of advanced ray tracing technologies, coupled with the rich instruction set of Xeon and Xeon Phi, transform your digital prototypes and architectural designs into compelling imagery and immersive presentations for interactive design reviews and stunning marketing materials.
New Flexible High Efficient Intel Iris/Iris Pro Quick Sync Video
THURSDAY, 25 JULY, 9-10 am
The fourth-generation Intel Core Processor introduces new Intel Iris/Iris Pro and HD Graphics, including the new Quick Sync Video technology. Its predecessors set a milestone in performance to deliver a blazingly fast transcode experience. The new Quick Sync Video delivers up to 12x of real-time transcode speed in best performance mode. Converting a 10-minute edited video to internet sharing-ready practically takes less than one minute. The Iris/Iris Pro series easily enables multi-session transcode and 4K video editing in real time. This session provides a high-level overview of the Intel media architecture, video quality improvement, and the energy-efficient high-performance solution, and a demonstration of Intel Quick Sync Video technology performance and quality.
Bring Out the Best in Pixels: Video Pipe in Intel Graphics Processor
THURSDAY, 25 JULY, 10:45-11:45 am
The graphics processor in the fourth-generation Intel Core Processors is equipped with a full set of video processing modules in its video processing pipe. This session introduces the video pipe and highlights its pixel-enhancement capability. To bring out the best in pixels from various input sources under different network connectivity and mobility environment, the video pipe is designed to be adaptive to input format, content, and quality. The session demonstrates how the individual HW modules can share information with one another and work together in an optimized fashion within the pipe. And it summarizes possibilities for SW applications to take advantage of the HW statistics collected from the input images for performance acceleration and quality improvement to the visual experiences delivered to Intel customers and end users.
Victor Hyeong-Seok Ha
ISPC: A SPMD Compiler for Xeon Phi & CPU – Tutorial
THURSDAY, 25 JULY, 12:15-1:45 pm
ISPC - the Intel SPMD Program Compiler - provides robust vectorization and corresponding SIMD utilization compared to traditional methods (for example, autovectorized C++) while preserving efficiency in invocation and data binding compared to approaches such as OpenCL. This session illustrates, from a semantics/anguage standpoint, why ISPC’s approach can produce compelling SIMD code vs. C++-based solutions. It also includes a brief tutorial using example ISPC code to introduce usage patterns and features, and demonstrates ISPC performance capabilities with more examples and highlights from the ISPC-based Intel Embree 2.0 ray tracing library.